First system-on-a-chip developed as part of a pioneering project between the University of Tampere, Finland, and companies
TAMPERE, Finland – (COMMERCIAL THREAD) –The first system on a chip (SoC) developed by the Finnish SoC Hub consortium has been registered. Project partners will then focus on improving the design, automation and performance of the SoC. The first of the three chips developed by the consortium will be ready for deployment in early 2022. The project contributes to strengthening Europe’s technological sovereignty.
finnish SoC Hub set out to develop the field of SoC design as a pioneer in Europe and improve the competitive position of Finland. The SoC Hub initiative, coordinated by the University of Tampere, Finland, and Nokia, was launched last year. The co-creation activities carried out by the partners go well beyond the framework of a conventional research project.
“The SoC was developed using the same methods used in industrial production, such as design for testability, in-depth verification, and an emphasis on system-level integration instead of single modules,” Explain Ari kulmala, Professor of SoC Design Practice at the University of Tampere.
According to Kulmala, the chip can also be tested by external stakeholders because it includes a development kit and it can be integrated into a wide range of other systems.
One of the main goals of the SoC Hub project is to enable the rapid prototyping of new ideas, for example, in the Internet of Things (IoT), machine learning, and 5G and 6G technologies in silicon.
The newly registered Ballast chip is the first in a series of three chips. The chip will be manufactured by TSMC, the world’s largest maker of semiconductor chips.
The chip is made using TSMC’s recent 22nm ultra-low leakage process, which is particularly well suited for IoT and Edge devices. The ballast contains several different RISC-V processor cores, a digital signal processor, an AI accelerator, rich sensor-like interfaces and an expansion interface to FPGA. A full software stack – including drivers, software development tools, and chip debugging support – has also been implemented. The chip simultaneously supports real-time and Linux operating systems.
“It was a pleasure to work with the SoC Hub team. They were extremely quick to develop the chip and the quality of the work was first class, ”says Bas-Dorren, director of business development at imec.IC-link, part of imec (an R&D center for nanotechnologies and digital technologies).
Two more chips registered in the next two years
Considering its large size, the chip was created in a very short time. The ambitious goal was achieved thanks to the good team spirit and the expertise and experience of the specialists involved.
“A lot of work has been done to enable transparent collaboration between the University and the business partners. Several early-stage researchers participated in the design of Ballast and therefore had the opportunity to apply the knowledge acquired during their studies in an industrial project ”, explains Timo Hämäläinen, Head of the Computer Science Unit at the University of Tampere.
Besides the development of the SoC, the first phase of the project was also a major undertaking, involving the constitution of the consortium and the preparation of the necessary software and license agreements. Led by the University of Tampere and Nokia, the consortium includes CoreHW, VLSI Solution, Siru Innovations, TTTEch Flexibilis, Procemex, Wapice and Cargotec as partners.
In the project funded by Business Finland, three SoCs will be registered by the end of 2023. Chip use cases will be planned with the project consortium.
“In the next phases of the project, we will be able to focus even more on the systematics, automation and performance of SoCs. Despite having achieved our first goal, we continue to move forward immediately. The time to invest in SoC development is now, not tomorrow ”, emphasizes Timo Hämäläinen.
University of Tampere
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