Intel Preps Software Defined Xeon Processors: Buy Now, Add Features Later
Intel released a room (discovered by Phoronix) which allows support for its Intel Software Defined Silicon (SDSi) mechanism on Linux. The technology is intended for future Intel Xeon processors and is designed to enable additional silicon functionality after a processor is deployed.
The patch doesn’t mention any specific functionality it’s supposed to unlock or any specific Xeon Scalable CPU it’s supposed to upgrade (we’re thinking of Sapphire Rapids), but it does give a general understanding of how it works. It turns out that the whole process is purely software, so it doesn’t require any hardware manipulation. Therefore, it can be done relatively easily.
Intel’s SDSi initiative appears to be a major move, but Intel is not new to offering software upgrades to its processors. The most recent example of such software scalability is Intel’s Virtual RAID on CPU (Intel VROC) which is based on the Intel Volume Management Device (VMD) hardware built into the processor and must be enabled using a special hardware key. The company also offered once its upgrade service software upgrade capability for its entry-level client processors, which would increase their clock speed, unlock some previously unused cache, and activate the technology. Hyper-Threading.
Intel has yet to describe in detail what it intends to offer as part of its Software Defined Silicon initiative, but the number of possible options is quite limitless.
Originally, Intel’s Pentium II / III / 4 Xeon processors were essentially desktop components with additional cache and SMP (symmetric multiprocessing) support. But Intel’s Xeon processors have acquired many features over the past 15 years that are not supported by client processors and are not required by client systems. In fact, Intel’s latest Xeon Scalable processors support instructions that are not supported by client models.
In recent years, Intel has started to differentiate the features and performance of its Xeon Scalable processors with high-end parts supporting more memory, eight-lane SMP capability, more cores, and all the technologies that the chip giant has to offer.
With the launch of its 4th Generation Sapphire Rapids Xeon Scalable processors, Intel will bring support for a plethora of new instructions and special accelerators designed for emerging workloads. Yet many Intel enterprise customers who use on-premises servers may not see any immediate value in technologies such as Advanced Matrix Extensions (AMX), Data Streaming Accelerator (DSA), or CXL 1.1. In fact, even hyperscale cloud service providers may not need all the features on all of their systems.
To meet the immediate needs of its customers, Intel wants to offer them processors in the configurations they need now, but with SDSi, it can leave the door open for future software upgrades if a customer needs additional functionality or simply decides to reuse a machine. Such scalability ensures that Intel customers don’t turn to AMD if they need an additional feature or two and will continue to pay Intel for its technologies.
Here is the official description of Intel’s Software Defined Silicon (SDSi) mechanism:
Intel Software Defined Silicon (SDSi) is a post-manufacturing mechanism for enabling additional silicon functionality. Features are activated through a license activation process. The SDSi driver provides a socket-based ioctl interface that allows applications to perform three main provisioning functions:
1. Provision an Authentication Key Certificate (AKC), a key written to internal NVRAM that is used to authenticate a capacity-specific activation payload.
2. Provision a capacity activation payload (CAP), a token authenticated using the AKC and applied to the processor configuration to enable a new feature.
3. Read the SDSi status certificate, containing the processor configuration status.
Ioctl operations execute function-specific mailbox commands that pass requests to SDSi hardware to perform payload authentication and enable silicon configuration (to be made available after a power cycle).
The SDSi device itself is listed as PCIe VSEC capability on the Intel Out Of Band Management Services Module (OOBMSM) device. The SDSi device is a cell of the intel_pmt MFD driver and as such has a build dependency on CONFIG_MFD_INTEL_PMT.